DIC10

1. contains two independent or identical 2 to 4 decoders

(a) 74X119

(b) 74X139

(c) 74X129

(d) 74X130

 

2. If ABCD represents naturally BCD, PQRST represents 2 out of 5 code, then Q is

(a) BC + BD + A1C1D1

(b) BC1 + BD1 + ACD

(c) BC1 + BD + A1CD1

(d) BC1 + BD1 + A1C1D1

 

3. is a priority encoder

(a) 74 × 144

(b) 74 × 148

(c) 74 × 48

(d) 74 × 146

 

4. EO L signal is an enable output designed to be connected to input of another 74 ×148.

(a) EO H

(b) EI H

(c) EO L

(d) EI L

 

5. 74 × 541 input has of hysteris

(a) 0.8V

(b) 0.6V

(c) 0.4 V

(d) 0.3V

 

6. is 2 input, 4 bit multiplexer.

(a) 74 × 541

(b) 74 × 148

(c) 74 × 157

(d) 74 × 155

 

7. Three state outputs in multiplexer useful when

(a) n input multiplexers are combined to form larger multiplexer.

(b) n input multiplexers are combined to form larger demultiplexer

(c) n -1 input multiplexers are combined to form larger demultiplexer

(d) n -1 input multiplexers are combined to form larger multiplexer

 

8. A block of flats has four floors and it is arranged that the lights for the stair well can be switched on or off at any

floor level.When the switch on, that level is operated. If switches on the four levels A, B ,C, & D and lights L ,the

Boolean expression for L is

(a) A B _ C _ D

(b) A _ B _ C _ D

(c) A _ B C _ D

(d) A _ B _ C D

 

9. Parity checking function Fe for even parity is

(a) D2 _ D1 _ D0

(b) D2 _ D1 _ P0

(c) [D2 _ D1 _ D0 _ P0]1

(d) D2 _ D1 _ D0 _ P0

 

10. In 74 × 283, carry Ci+1 is

(a) (xi + yi).(xiyi + Ci)

(b) (xi + yi).(xiyi + Ci)1

(c) (xi + yi). _ (xiyi + Ci)

(d) (xi + yi)1. + (xiyi + Ci)

 

11. For 74 x 182, Ci+1 is

(a) (xiyi+xi+yi) _ (xi+yi+Ci)

(b) (xi+yi+xi+yi)(xi+yi+Ci)

(c) (xiyi+xi+yi)(xiyi+Ci)

(d) (xi+yi+xi+yi)(xiyi _ Ci)

 

12. 24 bit comparator uses

(a) two 74 x 682, two 74 x 29, two 74 x 03

(b) three 74 x 682, two 74 x 27, three 74 x 02

(c) four 74 x 684, three74 x 27, three 74 x 02

(d) three 74 x 682, one 74 x 27, two 74 x 02

 

13. 74LS109 has the following characteristic equation.

(a) Q_ = S + R1.Q

(b) Q_ = D

(c) Q_ = J.Q1 + K L.Q

(d) Q_ = EN.D + EN1.Q

 

14. For proper circuit operation

(a) tclk − tffpd > tcombtsetup

(b) tclk − tffpd − tcomb = tsetup

(c) tclk − tffpd − tcomb > tsetup

(d) tclk − tffpd − tcomb <>setup

 

15. is 6 bit register.

(a) 74 × 112

(b) 74 × 174

(c) 74 × 375

(d) 74 × 75

 

16. GAL22V10 has tCF =

(a) 12 or 3.5

(b) 5 or 20

(c) 13 or 2.5

(d) 10 or 1.5

 

17. is 8 bit serial in parallel out shift register.

(a) 74 × 112

(b) 74 × 74

(c) 74 × 164

(d) GAL22V10

 

18. structure eliminate clock skew in ASIC.

(a) clock tree

(b) equalizers

(c) synchronizers

(d) clock latency

 

19. For 74HC04, low level is

(a) = 1.35 V

(b) > 1.35V

(c) < 1.5V

(d) < 1.35V

 

20. is 8K × 8 SRAM.

(a) GAL22V10

(b) 2764

(c) 74HC04

(d) HM6264